The present invention relates generally to data processing systems and more particularly to the coupling of units in such a data processing system for communication of information over a common electrical bus.
In data processing systems which utilize a common electrical bus for coupling the various units which desire to transfer information therebetween, for example, a central processor, memory, and various types of controllers, the speed in which such tranfers of information are handled is sometimes critical. Thus, it is very important to be sure that various signals are in a given binary state or at a predetermined level prior to the use thereof in the system. This is true for not only control signals but also for address and data signals. Typically, in order to provide waveforms which generate the required signal without reflections on the various electrical lines of the bus, each line is terminated with an impedance which matches the characteristic impedance of the particular line of the bus. In such case, there are no reflections of such signals on the bus in order to achieve the proper voltage to for example turn on a driver or transistor. This is so because such waveform achieves a threshold voltage in its initial rise and the signal thus does not take the additional period of time to recover as might be required where such signal makes more than one pass on the bus to achieve such threshold voltage. However, in so matching the characteristic impedance of a particular line with a terminating resistor, the power in the system is increased because of the well-known relationship of power to voltage and resistance. On the other hand, it is sometimes possible to utilize a terminating resistor whose value is greater than the characteristic impedance thereby causing reflections which, however, decrease the response time of the system. In some situations this decrease in response time is not tolerable, and, accordingly, a balance must be made between the power consumed and the speed of the system.
It is accordingly an object of the invention to provide a data processing system having a common bus coupling a plurality of units for transfer of information therebetween in which the signals on such bus are recovered in a manner consistent with decreasing the power required in the system while maintaining the response time of the system.